Specifiche SiS746
SiS ha reso note le specifiche dell'ultimo chipset della casa per piattaforme SocketA, il SiS746, dopo di che passerà direttamente ad Hammer!
High Performance Host Interface
- Supports AMD Socket A CPU: Polamino, Morgan, AthlonXP, & Duron
- Synchronous/Asynchronous Host-t-DRAM Timing: 100/200, 133/200, 100/266, 133/266, 100/333, 133/333
- S2K compliant bus driver with auto compensation capability
- Supports AMD PowerNow!™ dynamic power management function
64 bit high performance DDR-266/333 Memory Controller
- Supports 200/266/333 DDR SDRAM
- 3 Unbuffered DIMM of 2.5 volt DDR SDRAM
- Supports up to 2 unbuffered DIMM DDR333 or up to 3 unbuffered double-sided DIMM DDR266/200
- Up to 1 GB per DIMM with max. memory size up to 3 GB
- Supports 16Mb, 64Mb, 128Mb, 256Mb, 512Mb SDRAM technology with page size from 2KB up to 16KB
- Sustains DDR SDRAM CAS Latency at options of 2, 2.5, & 3 clocks
- Programmable buffer strength optimizing performance and stability
- Suspend to DRAM state
- High performance unified memory controller optimizing the DRAM bus utilization
Integrated A.G.P. Compliant Target/66MHz Host-to-PCI Bridge - AGP v3.0 Compliant
- Support AGP 8X/4X/2X Interface
High throughout MuTIOL™ Connect interfaced to SiS963 MuTIOL™ Media I/O
- Bi-directional 16 bit data bus
- 1 GB/s performance in 133MHz x 4 mode
- Distributed arbitration strategy with enhanced mode of contiguous DMA data streaming
- Packet based, pipelining, and split transaction scheme
Dedicated Isochronous Response Queue
- Serves Isochronous downstream transfers responsive to the memory read requests originated from USB or audio/modem controllers
- Offers privilege service to guarantee minimum latency & timely delivery
NAND Tree for Ball Connectivity Testing
713-Balls BGA Package
1.8V Core with Mixed 0.9V ~ 1.9V, 2.5V IO CMOS Technology
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