di Ghost il 06 mag 2005, 17:50
allora tu monti un bios award a quanto ho capito....cmq i codici degli errori dovrebbero essere questi:
AWARD POST Code Definition:
POST
Description
(hex)
CF Test CMOS R/W functionality
Early chipset initialization:
-Disable shadow RAM
C0
-Disable L2 cache (socket 7 or below)
-Program basic chipset registers
Detect memory
C1 -Auto-detection of DRAM size, type and ECC
-Auto-detection of L2 cache (socket 7 or below)
C3 Expand compressed BIOS code to DRAM
C5 Call chipset hook to copy BIOS back to E000 & F000 shadow RAM
01 Expand the Xgroup codes locating in physical address 1000:0
03 Initial Superio_Early_Init switch
1. Blank out screen
05
2. Clear CMOS error flag
1. Clear 8042 interface
07
2. Initialize 8042 self-test
1. Test special keyboard controller for Winbond 977 series Super I/O chips
08
2. Enable keyboard interface
1. Disable PS/2 mouse interface (optional)
0A 2. Auto detect ports for keyboard & mouse followed by a port & interface swap (optional)
3. Reset keyboard for Winbond 977 series Super I/O chips
Test F000h segment shadow to see whether it is R/W-able or not. If test fails, keep
0E
beeping the speaker
Auto detect flash type to load appropriate flash R/W codes into the run time area in F000
10
for ESCD & DMI support
Use walking 1's algorithm to check out interface in CMOS circuitry. Also set real-time
12
clock power status, and then check for override
Program chipset default values into chipset. Chipset default values are MODBINable by
14
OEM customers
Initial onboard clock generator if Early_Init_Onboard_Generator is defined. See also
16
POST 26.
Detect CPU information including brand, SMI type (Cyrix or Intel) and CPU level (586
18
or 686)
Initial interrupts vector table. If no special specified, all H/W interrupts are directed to
1B
SPURIOUS_INT_HDLR & S/W interrupts to SPURIOUS_soft_HDLR.
1D Initial EARLY_PM_INIT switch
1F Load keyboard matrix (notebook platform)
21 HPM initialization (notebook platform)
1. Check validity of RTC value: e.g. a value of 5Ah is an invalid value for RTC minute.
23 2. Load CMOS settings into BIOS stack. If CMOS checksum fails, use default value
instead.
Prepare BIOS resource map for PCI & PnP use. If ESCD is valid, take into consideration
24
of the ESCD's legacy information.
Early PCI Initialization:
-Enumerate PCI bus number.
25
-Assign memory & I/O resource
-Search for a valid VGA device & VGA BIOS, and put it into C000:0
1. If Early_Init_Onboard_Generator is not defined Onboard clock generator initialization.
Disable respective clock resource to empty PCI & DIMM slots.
26
2. Init onboard PWM
3. Init onboard H/W monitor devices
27 Initialize INT 09 buffer
1. Program CPU internal MTRR (P6 & PII) for 0-640K memory address.
2. Initialize the APIC for Pentium class CPU.
29
3. Program early chipset according to CMOS setup. Example: onboard IDE controller.
4. Measure CPU speed.
2B Invoke Video BIOS
1. Initialize double-byte language font (Optional)
2D 2. Put information on screen display, including Award title, CPU type, CPU speed, full
screen logo.
Reset keyboard if Early_Reset_KB is defined e.g. Winbond 977 series Super I/O chips.
33
See also POST 63.
35 Test DMA Channel 0
37 Test DMA Channel 1.
39 Test DMA page registers.
3C Test 8254
3E Test 8259 interrupt mask bits for channel 1
40 Test 8259 interrupt mask bits for channel 2
43 Test 8259 functionality
47 Initialize EISA slot
1. Calculate total memory by testing the last double word of each 64K page
49
2. Program writes allocation for AMD K5 CPU
1. Program MTRR of M1 CPU
2. Initialize L2 cache for P6 class CPU & program CPU with proper cacheable range
4E 3. Initialize the APIC for P6 class CPU
4. On MP platform, adjust the cacheable range to smaller one in case the cacheable ranges
between each CPU are not identical
50 Initialize USB
52 Test all memory (clear all extended memory to 0)
53 Clear password according to H/W jumper (Optional)
55 Display number of processors (multi-processor platform)
Display PnP logo
57 Early ISA PnP initialization
-Assign CSN to every ISA PnP device
59 Initialize the combined Trend Anti-Virus code
5B (Optional Feature) Show message for entering AWDFLASH.EXE from FDD (optional)
1. Initialize Init_Onboard_Super_IO
5D
2. Initialize Init_Onbaord_AUDIO
Okay to enter Setup utility; i.e. not until this POST stage can users enter the CMOS setup
60
utility
63 Reset keyboard if Early_Reset_KB is not defined
65 Initialize PS/2 Mouse
67 Prepare memory size information for function call: INT 15h ax=E820h
69 Turn on L2 cache
Program chipset registers according to items described in Setup & Auto-configuration
6B
table
1. Assign resources to all ISA PnP devices
6D 2. Auto assign ports to onboard COM ports if the corresponding item in Setup is set to
"AUTO"
1. Initialize floppy controller
6F
2. Set up floppy related fields in 40:hardware
75 Detect & install all IDE devices: HDD, LS120, ZIP, CDROM ...
(Optional Feature)
Enter AWDFLASH.EXE if:
76
-AWDFLASH is found in floppy drive
-ALT+F2 is pressed
77 Detect serial ports & parallel ports.
7A Detect & install co-processor
7C Init HDD write protect
Switch back to text mode if full screen logo is supported
7F -If errors occur, report errors & wait for keys
-If no errors occur or F1 key is pressed to continue: Clear EPA or customization logo
E8POST.ASM starts
1. Call chipset power management hook
82 2. Recover the text font used by EPA logo (not for full screen logo)
3. If password is set, ask for password
83 Save all data in stack back to CMOS
84 Initialize ISA PnP boot devices
1. USB final Initialization
85
2. Switch screen back to text mode
87 NET PC: Build SYSID Structure
1. Assign IRQs to PCI devices
89
2. Set up ACPI table at top of the memory.
1. Invoke all ISA adapter ROMs
8B
2. Invoke all PCI ROMs (except VGA)
1. Enable/Disable Parity Check according to CMOS setup
8D
2. APM Initialization
8F Clear noise of IRQs
93 Read HDD boot sector information for Trend Anti-Virus code
1. Enable L2 cache
2. Program Daylight Saving
3. Program boot up speed
4. Chipset final initialization.
94
5. Power management final initialization
6. Clear screen & display summary table
7. Program K6 write allocation
8. Program P6 class write combining
95 Update keyboard LED & typematic rate
1. Build MP table
2. Build & update ESCD
96 3. Set CMOS century to 20h or 19h
4. Load CMOS time into DOS timer tick
5. Build MSIRQ routing table
FF Boot attempt (INT 19h)
AC2003 POST Code Definition:
POST
Description
(hex)
Power On Sequence
8.1. Start power on sequence
8.2. Enable ATX power supply
8.3. ATX power supply ready
8.4. DDR voltage ready
8.5. Setup PWM for CPU core voltage
8.6. Assert PWM for CPU core voltage
8.7. Check CPU core voltage
8.8. CPU core voltage ready
8.9. Initial clock generator IC
8.A. North Bridge chipset voltage ready
8.B. AGP voltage ready
8.C. 3VDUAL voltage ready
8.D. VDDA 2.5V voltage ready
8.D. GMCHVTT voltage ready
8.E. Check CPU fan speed
8.F. Assert all power ready
Complete uGuru initial process
9.0.
AWARD BIOS take over booting job
Power Off Sequence
9.1. Start power off sequence
9.2. De-Assert all power
9.3. Se-Assert power on
9.4. De-Assert LDT Bus power
9.5. De-Assert PWM for CPU core voltage
9.6. De-Assert CPU core voltage
9.7. Check CPU core voltage
9.8. De-Assert ATX power supply
9.9. Complete power off sequence
Others
F.0. Button reset
F.1. SoftMenu reset
F.2. Power on sequence timeout
F.3. Power off sequence timeout
Dfi-Ultra-D - Sandy 3700+@ 3.05ghz 1.39v daily - 2X512 Ballistix Tracer 273 2.5-3-3-8, hdd p-ata 40gb + sistema scsi u320 18.2gb 150000rpm, controller 29160N....x600pro - audigy x-fi - ybris k9 + keops 650 + dual gioma 1600.
278.8 cas 1.5-2-2-0..grazie BH-5
saturday's Overclockers team